decoder circuit
英 [ˌdiːˈkəʊdə(r) ˈsɜːkɪt]
美 [ˌdiːˈkoʊdər ˈsɜːrkɪt]
译码器电路
双语例句
- Moreover, there are many shareable modules used in the decoder, and it can reduce the circuit scale.
该译码器电路尽可能多地使用可以共享的模块，降低了电路的规模。 - Circuit design by infra-red coding circuit, infrared decoder circuit, drop the electricity protection circuit, sound and light hint alarming circuit, the keyboard and display circuit.
设计电路主要由红外线编码电路、红外线解码开锁电路、掉电保护电路、声光提示报警电路、键盘及显示电路组成。 - Design of Absolute Optical Encoder Decoder Circuit and Analog Circuit Fault Diagnosis
绝对式光电码盘译码电路设计及模拟电路故障诊断研究 - A Full Digital Solution of the Decoder Circuit With High Reliability
光电编码器的高可靠性数字译码方案研究 - Design of an Alternative VHF Transceiver Decoder Circuit
甚高频通信电台译码电路替代设计 - Beside the CD decoder circuit is needed, a DVD player/ driver need a pick-up head capable to read CD, so that it can read both CD and DVD.
为了能与CD类光盘兼容，DVD播放器/驱动器中除了要有完成CD类盘片的解码电路外，其光学头也需能同时读取CD盘片。 - The paper related on the design with MSI ( especially with data selector and decoder) to realize combined logical circuit and had a discussion on several cases.
本文叙述了用MSI（主要是数据选择器和译码器）设计组合逻辑电路的方法，并分几种情况加以讨论。 - The CAS Decoder Circuit Design Based on CMOS Switch Capacitor Technology
基于CMOS开关电容技术的CAS解调电路设计 - The paper introduces a method of digital electronic clock design based on EWB and the system is made up by silicon crystal oscillator, frequency divider, number counter, decoder circuit, LED display circuit, calibrated circuit, chirping circuit.
介绍了一种基于EWB软件设计电子钟的方法，系统由石英晶体振荡器、分频器、计数器、译码电路、LED显示电路、校时电路、整点报时电路组成。 - The Principle and Design of a Quadrature Decoder Circuit
正交译码接口电路的原理与设计 - Several digital circuits are also used in the proposed DAC to implement such as flip-latch circuit, thermometer decoder, current select circuit, etc.
设计了DAC的数字电路部分包括锁存器、温度计译码器、电流源状态逻辑选电路等。 - In the controlling part, we introduced the real time clock, switch inputs and switch outputs, communication interface, human-machine interface, decoder, data storing, power monitoring circuit design.
在配电变压器监测终端控制部分介绍了以80C196KC单片机为控制核心的电路设计，包括实时时钟、通信接口、开关量输入和输出、人机界面、数据存储、译码控制、电源监控电路的实现。 - A fast access time is achieved by using six-transistor CMOS memory cell, latched sense amplifier, and high-speed decoder circuit.
存储器采用六管CMOS存储单元、锁存器型敏感放大器和高速译码电路，以期达到最快的存取时间。 - A decoder circuit, a encoder circuit and a latch circuit are also designed, and parts of layout are realized.
设计了数字译码电路、编码电路和锁存器电路，并进行了部分版图设计。 - The FLEX decoder designed in this paper includes the physical layer block, the date link layer block, the BCH decoder and the SPI interface circuit.
该设计采用自顶向下的设计方法，对FLEX解码系统进行功能层次上的划分，系统主要包括：物理层处理模块，数据链路层处理模块，解码及纠错模块，以及数据接收和发送模块。 - This paper introduces the fundamentals of the surface decoder circuit of PCMin Dresser CLS3700.
本文详细的介绍了3700数字测井仪地面PCM解码线路原理。 - This paper describes the error control coding of the FLEX paging system, with emphasis on the design and implement of the FLEX decoder circuit by means of the FPGA technology.
本文介绍了FLEX高速无线寻呼系统中的差错控制编码技术，以及BCH（32，21）纠错码的构成和译码方法，重点讨论了FLEX高速寻呼解码芯片的FPGA设计与实现。 - The self-made magnetic generator, which is composed of an oscillator, a second-order system, a scaler, a decoder, a circuit and Helmholtz-loops, account for designing and tailing a second-order system especially, which using switch capacitance technic implement tracking signal.
自制的磁场发生器由振荡器、二阶系统、计数器、译码器、功率电路和亥姆霍兹线圈等部分组成，重点说明了二阶系统的设计制作，及其利用的开关电容技术实现信号的跟踪。 - An implementation method and the implementation result of HDTV video decoder bit stream distribution circuit are given out in this paper based on the HDTV video stream construction.
文中在介绍高清晰度电视视频码流结构的基础上，提出了高清晰度电视视频解码器中码流分配电路的实现方法，并给出了实现结果。 - A study on the test signals for PAL-D color decoder circuit
PAL-D制彩色电视解码电路测试信号的研究 - The design of SECAM decoder is based on digital integrated circuit design flow. The matlab software is used to design the algorithm when the hardware implementation is considered at the same time.
SECAM制解码器的设计以数字集成电路的设计流程为主线，在考虑硬件实现的同时，先用Matlab语言进行算法方面的设计。 - The input decoder circuit is mainly constrainted by the decoding delay, so reducing the decoding delay become the main target. and we also have to make sure the delay of each signal is as same as possible.
其中，输入解码电路主要是受解码延迟的约束，因此降低延迟成为了主要目标，其次要尽量保证各位之间的延迟尽量相同。 - A FIR filter circuit and real world IDCT decoder circuit are used to test the new algorithm; the experimental results show that the total delay of the circuit was optimized by 8%. A new algorithm for high level re-scheduling after floorplan is presented in this thesis.
论文中通过fir滤波器和实际的IDCT解码器对算法进行了验证，实验证明算法可以对电路达到8%的电路性能改进。提出一种新的布图规划后高层次再调度算法。 - Finally, the DVI encoder/ decoder circuit and the LED driver display circuit was respectively proposed to be the corresponding video information leakage suppression means.
最后，分别对DVI编/解码电路和LED驱动显示电路提出了相应的视频信息泄漏抑制手段。 - To achieve the design and optimization for the high performance decoder circuit via the positive size of the transistors in SRAM decoder circuit according to the theoretical models of delay optimization. 2.
根据延迟优化的理论模型可确定SRAM存储器中译码电路的晶体管尺寸，从而实现高性能译码电路的设计及优化。 - The memory, decoder and sense amplifier circuit are designed and optimized.
设计和优化了存储电路、译码电路、敏感放大电路。 - On this basis, the structure and working principles of the potential leak source the DVI encoder/ decoder circuit, the Ethernet sending/ receiving circuit, the LED driver and displays was respectively analyzed, and the signal characteristic of each module was researched in detail.
在此基础上，分别对潜在的泄漏源&DVI编/解码电路、以太发送/接收电路、LED驱动显示电路各部分的基本结构和工作原理进行了详细分析，详细研究了各个模块的信号特征。 - On the basis of the analysis, it proposed the input decoder algorithm and the circuit implementation. And the paper also designed current switch drivers for the nmos and pmos current source matrix.
在此基础上，提出了输入解码电路的算法以及实现电路，并分别针对NMOS和PMOS电流源矩阵设计了电流源开关驱动器。 - According to the analysis and abstract of the software and hardware interface, the configuration circuit of FPGA includes these parts: configuration interface, configuration registers, bus decoder interface, and configuration control circuit.
通过对FPGA的软硬件接口环境的分析和抽象建模，本文提出的配置电路包含配置接口电路，配置寄存器，总线译码部分和配置电路控制模块。